The present invention relates to a semiconductor device and a manufacturing method thereof, in particular, to a semiconductor device having a trench and a manufacturing method of the device.
For example, Japanese Patent Laid-Open No. 2002-118256 discloses an element isolation (deep trench isolation: DTI) structure obtained by filling an insulating film in a trench with a high aspect ratio.
According to the technology described in the document, first, a trench is formed in the surface of a semiconductor substrate. A first insulating film is then formed over the surface of the semiconductor substrate so as to embed the trench with the film. The first insulating film is then anisotropically etched to form, in the first insulating film, an opening reaching the trench. By this etching, an upper end corner portion of the opening of the first insulating film has a gradient smaller than that of the upper end corner portion of the trench. Further, the anisotropic etching reduces the thickness of the first insulating film over the surface of the semiconductor substrate. A second insulating film is then formed over the surface of the semiconductor substrate to embed the opening with the film.
After formation of the DTI structure as described above, electron elements such as MOSFET (metal oxide semiconductor field effect transistor) are formed on the semiconductor substrate.
[Patent Document 1]
Japanese Patent Laid-Open No. 2002-118256